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Tenbric
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WHAT WE’RE BUILDING

Proprietary two-domain coupling topology enabling continuous-time signal transformation without reliance on fixed, discrete circuit topologies.

Patents pending (UK)



Two continuous domains are shown, separated by a controlled coupling region that shapes signal energy as it moves between layers. The geometry illustrates constrained transfer, conditioning, and redistribution prior to digitisation.

KEY CHARACTERISTICS

  • Pre-ADC analog decision layer integrated into the signal chain

  • Continuous-time signal compression and relevance filtering

  • Reduces ADC load and downstream digital processing cost

  • Designed for low-power, embedded, and RF-adjacent applications

Pre-ADC Analog Signal Conditioning Layer



The diagram illustrates structured signal pathways operating in the analog domain, where routing, aggregation, and conditioning occur before any discrete sampling. The emphasis is on early-stage signal shaping and load reduction, showing how useful structure can be extracted or reorganised upstream of an ADC without committing to a specific circuit topology or physical substrate.

TENBRIC is developing a pre-ADC Analog Decision Layer (ADL) — a hardware front-end that operates on signals before digitisation.


The ADL evaluates continuous-time signal dynamics to suppress irrelevant structure early, reducing the bandwidth, precision, and downstream digital computation required after sampling.


This work focuses on hardware-implementable analog architectures intended for low-power, embedded, and signal-constrained systems.

WHY THIS MATTERS

This work addresses a real technical opportunity, but it also carries identifiable risks that shape how development must proceed.

TECHNICAL RISK

Novel analog architectures must demonstrate reliable performance, stability, and repeatability under real-world signal conditions and manufacturing tolerances.

INTEGRATION RISK

Value depends on successful insertion into existing signal chains without requiring disruptive changes to downstream digital infrastructure.

EXECUTION RISK

Progress requires iterative prototyping, measurement, and refinement to validate assumptions and converge on a deployable hardware implementation.

HOW WE WORK

We conduct applied research and development focused on building, testing, and validating new analog signal processing architectures.

Our work is prototype-driven, with emphasis on bench-level validation and clear integration pathways into existing systems.

CORE ACTIVITIES:

  • Hardware prototyping and custom test platforms

  • Analog front-end experimentation and characterisation

  • System-level validation prior to downstream integration

  • Intellectual property development and protection

ABOUT

Tenbric is a UK-based early-stage hardware research and development company focused on novel analog signal processing primitives.

The company is engaged in applied R&D intended to lead to commercially deployable hardware systems and related intellectual property.

Tenbric was founded by a technical founder and is currently operating at a pre-revenue, pre-product stage.

KIERAN PATRICK

SEEBACH


Founder & Director

Technical focus: development of novel analog signal processing architectures through hands-on hardware R&D.

Kieran’s background is in sound design and music programming, where long-term exposure to signal behaviour, dynamics, and system constraints informed the initial technical direction of the work. Tenbric was founded to translate this domain intuition into formal analog hardware research, with the founder directly responsible for architecture definition, prototyping, measurement, and validation.

Contact

kieran@tenbric.com
(+44) 7391 886961

TENBRIC Ltd | Registered in England and Wales | Company No. 16908826 | Registered Office: 1097a Manchester Road, Slaithwaite, Huddersfield, England, HD7 5LU